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Feipei Lai (Selection)

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46Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLShanq-Jang Ruan, Kun-Lin Tsai, Edwin Naroska, Feipei Lai: Bipartitioning and encoding in low-power pipelined circuits. ACM Trans. Design Autom. Electr. Syst. 10(1): 24-32 (2005)
39Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLEdwin Naroska, Shanq-Jang Ruan, Chia-Lin Ho, Said Mchaalia, Feipei Lai, Uwe Schwiegelshohn: A novel approach for digital waveform compression. ASP-DAC 2003: 712-715
37Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLEdwin Naroska, Shanq-Jang Ruan, Feipei Lai, Uwe Schwiegelshohn, Le-Chin Liu: On optimizing power and crosstalk for bus coupling capacitance using genetic algorithms. ISCAS (5) 2003: 277-280
33Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLShanq-Jang Ruan, Edwin Naroska, Yen-Jen Chang, Chia-Lin Ho, Feipei Lai: Energy analysis of bipartition architecture for pipelined circuits. APCCAS (2) 2002: 7-11
32Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLShanq-Jang Ruan, Edwin Naroska, Chia-Lin Ho, Feipei Lai: Power Analysis of Bipartition and Dual-Encoding Architecture for Pipelined Circuits. ICCD 2002: 327-
28Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLShanq-Jang Ruan, Edwin Naroska, Yen-Jen Chang, Feipei Lai, Uwe Schwiegelshohn: ENPCO: an entropy-based partition-codec algorithm to reduce power for bipartition-codec architecture in pipelined circuits. IEEE Trans. VLSI Syst. 10(6): 942-949 (2002)
22Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLEdwin Naroska, Feipei Lai, Rung-Ji Shang, Uwe Schwiegelshohn: Efficient parallel timing simulation of synchronous models on networks of workstations. Journal of Systems Architecture 47(6): 517-528 (2001)
21Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLEdwin Naroska, Rung-Ji Shang, Feipei Lai, Uwe Schwiegelshohn: Hybrid Parallel Circuit Simulation Approaches. IEEE PACT 2000: 261-270

Selection of 8 from 102 records - Feipei Lai has 132 coauthors

Last update 2012-09-10 CET by the DBLP TeamThis material is Open Data Content released under the ODC-BY 1.0 license — See also our legal information page