dblp.uni-trier.dewww.dagstuhl.dewww.uni-trier.de

Hirotsugu Kojima (Selection)

List of publications from the DBLP Bibliography Server - FAQ
Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo

Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo


3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRaminder Singh Bajwa, Mitsuru Hiraki, Hirotsugu Kojima, Douglas J. Gorny, Ken-ichi Nitta, Avadhani Shridhar, Koichi Seki, Katsuro Sasaki: Instruction buffering to reduce power in processors for signal processing. IEEE Trans. VLSI Syst. 5(4): 417-424 (1997)
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHirotsugu Kojima, Avadhani Shridhar: Interlaced accumulation programming for low power DSP. ISLPED 1996: 213-216
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMitsuru Hiraki, Raminder Singh Bajwa, Hirotsugu Kojima, Douglas J. Gorny, Ken-ichi Nitta, Avadhani Shridhar, Katsuro Sasaki, Koichi Seki: Stage-skip pipeline: a low power processor architecture using a decoded instruction buffer. ISLPED 1996: 353-358

Selection of 3 from 5 records - Hirotsugu Kojima has 13 coauthors

Last update 2012-09-10 CET by the DBLP TeamThis material is Open Data Content released under the ODC-BY 1.0 license — See also our legal information page