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Masaya Kibune (Selection)

List of publications from the DBLP Bibliography Server - FAQ
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10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTina Tahmoureszadeh, Siamak Sarvari, Ali Sheikholeslami, Hirotaka Tamura, Yasumoto Tomita, Masaya Kibune: A combined anti-aliasing filter and 2-tap FFE in 65-nm CMOS for 2× blind 2-;10 Gb/s ADC-based receivers. CICC 2010: 1-4
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLOleksiy Tyshchenko, Ali Sheikholeslami, Hirotaka Tamura, Yasumoto Tomita, Hisakatsu Yamaguchi, Masaya Kibune, Takuji Yamamoto: A fractional-sampling-rate ADC-based CDR with feedforward architecture in 65nm CMOS. ISSCC 2010: 166-167
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHisakatsu Yamaguchi, Hirotaka Tamura, Yoshiyasu Doi, Yasumoto Tomita, Takayuki Hamada, Masaya Kibune, Shuhei Ohmoto, Keita Tateishi, Oleksiy Tyshchenko, Ali Sheikholeslami, Tomokazu Higuchi, Junji Ogawa, Tamio Saito, Hideki Ishida, Kohtaroh Gotoh: A 5Gb/s transceiver with an ADC-based feedforward CDR and CMA adaptive equalizer in 65nm CMOS. ISSCC 2010: 168-169
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLXiaolei Zhu, Yanfei Chen, Masaya Kibune, Yasumoto Tomita, Takayuki Hamada, Hirotaka Tamura, Sanroku Tsukamoto, Tadahiro Kuroda: A Dynamic Offset Control Technique for Comparator Design in Scaled CMOS Technology. IEICE Transactions 93-A(12): 2456-2462 (2010)
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYanfei Chen, Xiaolei Zhu, Hirotaka Tamura, Masaya Kibune, Yasumoto Tomita, Takayuki Hamada, Masato Yoshioka, Kiyoshi Ishikawa, Takeshi Takayama, Junji Ogawa, Sanroku Tsukamoto, Tadahiro Kuroda: Split Capacitor DAC Mismatch Calibration in Successive Approximation ADC. IEICE Transactions 93-C(3): 295-302 (2010)
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNikola Nedovic, Anders Kristensson, Samir Parikh, Subodh M. Reddy, Scott McLeod, Nestoras Tzartzanis, Kouichi Kanda, Takuji Yamamoto, Satoshi Matsubara, Masaya Kibune, Yoshiyasu Doi, Satoshi Ide, Yukito Tsunoda, Tetsuji Yamabana, Takayuki Shibasaki, Yasumoto Tomita, Takayuki Hamada, Mariko Sugawara, Tadashi Ikeuchi, Naoki Kuwata, Hirotaka Tamura, Junji Ogawa, William W. Walker: A 3 Watt 39.8-44.6 Gb/s Dual-Mode SFI5.2 SerDes Chip Set in 65 nm CMOS. J. Solid-State Circuits 45(10): 2016-2029 (2010)
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYanfei Chen, Xiaolei Zhu, Hirotaka Tamura, Masaya Kibune, Yasumoto Tomita, Takayuki Hamada, Masato Yoshioka, Kiyoshi Ishikawa, Takeshi Takayama, Junji Ogawa, Sanroku Tsukamoto, Tadahiro Kuroda: Split capacitor DAC mismatch calibration in successive approximation ADC. CICC 2009: 279-282

Selection of 7 from 14 records - Masaya Kibune has 44 coauthors

Last update 2012-09-10 CET by the DBLP TeamThis material is Open Data Content released under the ODC-BY 1.0 license — See also our legal information page