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Kurt Keutzer (Selection)

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104Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGary Smith, Daya Nadamuni, Sharad Malik, Rick Chapman, John Fogelin, Kurt Keutzer, Grant Martin, Brian Bailey: Unified tools for SoC embedded systems: mission critical, mission impossible or mission irrelevant? DAC 2002: 479
102Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWei Qin, Subramanian Rajagopalan, Manish Vachharajani, Hangsheng Wang, Xinping Zhu, David I. August, Kurt Keutzer, Sharad Malik, Li-Shiuan Peh: Design Tools for Application Specific Embedded Processors. EMSOFT 2002: 319-333
100Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKurt Keutzer, Sharad Malik, A. Richard Newton: From ASIC to ASIP: The Next Design Discontinuity. ICCD 2002: 84-90
96Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAndrew Mihal, Chidamber Kulkarni, Matthew W. Moskewicz, Mel M. Tsai, Niraj Shah, Scott J. Weber, Yujia Jin, Kurt Keutzer, Christian Sauer, Kees A. Vissers, Sharad Malik: Developing Architectural Platforms: A Disciplined Approach. IEEE Design & Test of Computers 19(6): 6-16 (2002)
92Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMarco Sgroi, Michael Sheets, Andrew Mihal, Kurt Keutzer, Sharad Malik, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli: Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design. DAC 2001: 667-672
57Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKurt Keutzer, Sharad Malik: Register Transfer Level Synthesis: From Theory to Practice. VLSI Design 1996: 2
45no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGuido Araujo, Srinivas Devadas, Kurt Keutzer, Stan Y. Liao, Sharad Malik, Ashok Sudarsanam, Steven W. K. Tjiang, Albert Wang: Challenges in code generation for embedded processors. Code Generation for Embedded Processors 1994: 48-64
43Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Certified timing verification and the transition delay of a logic circuit. IEEE Trans. VLSI Syst. 2(3): 333-342 (1994)
42Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Event suppression: improving the efficiency of timing simulation for synchronous digital circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 13(6): 814-822 (1994)
41Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Verification of asynchronous interface circuits with bounded wire delays. VLSI Signal Processing 7(1-2): 161-182 (1994)
38Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHorng-Fei Jyu, Sharad Malik, Srinivas Devadas, Kurt Keutzer: Statistical timing analysis of combinational logic circuits. IEEE Trans. VLSI Syst. 1(2): 126-137 (1993)
37Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrinivas Devadas, Kurt Keutzer, Sharad Malik: Computation of floating mode delay in combinational circuits: theory and algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 12(12): 1913-1923 (1993)
36Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Computation of floating mode delay in combinational circuits: practice and implementation. IEEE Trans. on CAD of Integrated Circuits and Systems 12(12): 1924-1936 (1993)
34Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrinivas Devadas, Kurt Keutzer, Sharad Malik: A synthesis-based test generation and compaction algorithm for multifaults. J. Electronic Testing 4(1): 91-104 (1993)
32Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Certified Timing Verification and the Transition Delay of a Logic Circuit. DAC 1992: 549-555
31Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrinivas Devadas, Kurt Keutzer, Sharad Malik, Albert Wang: Verification of asynchronous interface circuits with bounded wire delays. ICCAD 1992: 188-195
29no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrinivas Devadas, Horng-Fei Jyu, Kurt Keutzer, Sharad Malik: Statistical Timing Analysis of Combinational Circuits. ICCD 1992: 38-43
21Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrinivas Devadas, Kurt Keutzer, Sharad Malik: A Synthesis-Based Test Generation and Compaction Algorithm for Multifaults. DAC 1991: 359-365
19no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSrinivas Devadas, Kurt Keutzer, Sharad Malik: Delay Computation in Combinational Logic Circuits: Theory and Algorithms. ICCAD 1991: 176-179
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKurt Keutzer, Sharad Malik, Alexander Saldanha: Is redundancy necessary to reduce delay? IEEE Trans. on CAD of Integrated Circuits and Systems 10(4): 427-435 (1991)
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKurt Keutzer, Sharad Malik, Alexander Saldanha: Is Redundancy Necessary to Reduce Delay. DAC 1990: 228-234

Selection of 21 from 158 records - Kurt Keutzer has 177 coauthors

Last update 2012-09-10 CET by the DBLP TeamThis material is Open Data Content released under the ODC-BY 1.0 license — See also our legal information page