William Jiang (Selection)

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1 Fuding Ge, Malay Trivedi, Brent Thomas, William Jiang, Hongjiang Song: 1.5V 0.5mW 2MSPS 10B DAC with rail-to-rail output in 0.13mum CMOS technology. SoCC 2008: 257-260

Selection of 1 from 1 records - William Jiang has 4 coauthors

Last update 2012-09-10 CET by the DBLP Team —

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