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| 4 |       | William Adams, Warren A. Hunt Jr., Damir Jamsek: Verisym: Verifying Circuits by Symbolic Simulation. Formal Methods in System Design 22(2): 163-173 (2003) |
Selection of 1 from 5 records - Damir Jamsek has 18 coauthors
Copyright © 2009-11-27 by Michael Ley (ley@uni-trier.de)