Luong Dinh Hung (Selection)

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6 Luong Dinh Hung, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai: Utilization of SECDED for soft error and variation-induced defect tolerance in caches. DATE 2007: 1134-1139

5 Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai: SEVA: A Soft-Error- and Variation-Aware Cache Architecture. PRDC 2006: 47-54

4 Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai: Mitigating Soft Errors in Highly Associative Cache with CAM-based Tag. ICCD 2005: 342-350

3 Luong Dinh Hung, Shuichi Sakai: Dynamic Estimation of Task Level Parallelism with Operating System Support. ISPAN 2005: 358-363

2 Hideyuki Miura, Luong Dinh Hung, Chitaka Iwama, Daisuke Tashiro, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka: Compiler-Assisted Thread Level Control Speculation. Euro-Par 2003: 603-608

1 Yoshimitsu Yanagawa, Luong Dinh Hung, Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka: Complexity Analysis of a Cache Controller for Speculative Multithreading Chip Multiprocessors. HiPC 2003: 393-404

Selection of 6 from 6 records - Luong Dinh Hung has 9 coauthors

6		Luong Dinh Hung, Hidetsugu Irie, Masahiro Goshima, Shuichi Sakai: Utilization of SECDED for soft error and variation-induced defect tolerance in caches. DATE 2007: 1134-1139
5		Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai: SEVA: A Soft-Error- and Variation-Aware Cache Architecture. PRDC 2006: 47-54
4		Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai: Mitigating Soft Errors in Highly Associative Cache with CAM-based Tag. ICCD 2005: 342-350
3		Luong Dinh Hung, Shuichi Sakai: Dynamic Estimation of Task Level Parallelism with Operating System Support. ISPAN 2005: 358-363
2		Hideyuki Miura, Luong Dinh Hung, Chitaka Iwama, Daisuke Tashiro, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka: Compiler-Assisted Thread Level Control Speculation. Euro-Par 2003: 603-608
1		Yoshimitsu Yanagawa, Luong Dinh Hung, Chitaka Iwama, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka: Complexity Analysis of a Cache Controller for Speculative Multithreading Chip Multiprocessors. HiPC 2003: 393-404