Chao-Tsung Huang (Selection)

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19 Chih-Chi Cheng, Chao-Tsung Huang, Ching-Yeh Chen, Chung-Jr Lian, Liang-Gee Chen: On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform. IEEE Trans. Circuits Syst. Video Techn. 17(7): 814-822 (2007)

14 Chih-Chi Cheng, Chao-Tsung Huang, Po-Chih Tseng, Chia-Ho Pan, Liang-Gee Chen: Multiple-lifting scheme: memory-efficient VLSI implementation for line-based 2-D DWT. ISCAS (5) 2005: 5190-5193

Selection of 2 from 19 records - Chao-Tsung Huang has 13 coauthors

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19		Chih-Chi Cheng, Chao-Tsung Huang, Ching-Yeh Chen, Chung-Jr Lian, Liang-Gee Chen: On-Chip Memory Optimization Scheme for VLSI Implementation of Line-Based Two-Dimentional Discrete Wavelet Transform. IEEE Trans. Circuits Syst. Video Techn. 17(7): 814-822 (2007)
14		Chih-Chi Cheng, Chao-Tsung Huang, Po-Chih Tseng, Chia-Ho Pan, Liang-Gee Chen: Multiple-lifting scheme: memory-efficient VLSI implementation for line-based 2-D DWT. ISCAS (5) 2005: 5190-5193