Filip Hellebaut (Selection)

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2 Luk Van Ertvelde, Filip Hellebaut, Lieven Eeckhout: Accurate and Efficient Cache Warmup for Sampled Processor Simulation Through NSL-BLRL. Comput. J. 51(2): 192-206 (2008)

1 Luk Van Ertvelde, Filip Hellebaut, Lieven Eeckhout, Koen De Bosschere: NSL-BLRL: Efficient CacheWarmup for Sampled Processor Simulation. Annual Simulation Symposium 2006: 168-177

Selection of 2 from 2 records - Filip Hellebaut has 3 coauthors

2		Luk Van Ertvelde, Filip Hellebaut, Lieven Eeckhout: Accurate and Efficient Cache Warmup for Sampled Processor Simulation Through NSL-BLRL. Comput. J. 51(2): 192-206 (2008)
1		Luk Van Ertvelde, Filip Hellebaut, Lieven Eeckhout, Koen De Bosschere: NSL-BLRL: Efficient CacheWarmup for Sampled Processor Simulation. Annual Simulation Symposium 2006: 168-177