Jianjun He (Selection)

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2 Jianjun He, Jiafeng Xie: Hardware Efficient Approach for Memoryless-Based Multiplication and Its Application to FIR Filter. JCP 6(11): 2376-2381 (2011)

1 Jiafeng Xie, Jianjun He, Guanzheng Tan: FPGA realization of FIR filters for high-speed and medium-speed by using modified distributed arithmetic architectures. Microelectronics Journal 41(6): 365-370 (2010)

Selection of 2 from 6 records - Jianjun He has 5 coauthors

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2		Jianjun He, Jiafeng Xie: Hardware Efficient Approach for Memoryless-Based Multiplication and Its Application to FIR Filter. JCP 6(11): 2376-2381 (2011)
1		Jiafeng Xie, Jianjun He, Guanzheng Tan: FPGA realization of FIR filters for high-speed and medium-speed by using modified distributed arithmetic architectures. Microelectronics Journal 41(6): 365-370 (2010)