Donghoon Han (Selection)

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6 Hyun Choi, Donghoon Han, Abhijit Chatterjee: Enhanced Resolution Jitter Testing Using Jitter Expansion. VTS 2007: 104-109

5 Donghoon Han, Shalabh Goyal, Soumendu Bhattacharya, Abhijit Chatterjee: Low Cost Parametric Failure Diagnosis of RF Transceivers. European Test Symposium 2006: 205-212

4 Donghoon Han, Abhijit Chatterjee: Robust Built-In Test of RF ICs Using Envelope Detectors. Asian Test Symposium 2005: 2-7

3 Donghoon Han, Selim Sermet Akbay, Soumendu Bhattacharya, Abhijit Chatterjee, William R. Eisenstadt: On-Chip Self-Calibration of RF Circuits Using Specification-Driven Built-In Self Test (S-BIST). IOLTS 2005: 106-111

2 Donghoon Han, Abhijit Chatterjee: Device Resizing Based Optimization of Analog Circuits for Reduced Test Cost: Cost Metric and Case Study. Asian Test Symposium 2004: 420-425

1 Donghoon Han, Abhijit Chatterjee: Simulation-in-the-Loop Analog Circuit Sizing Method using Adaptive Model-based Simulated Annealing. IWSOC 2004: 127-130

Selection of 6 from 6 records - Donghoon Han has 6 coauthors

6		Hyun Choi, Donghoon Han, Abhijit Chatterjee: Enhanced Resolution Jitter Testing Using Jitter Expansion. VTS 2007: 104-109
5		Donghoon Han, Shalabh Goyal, Soumendu Bhattacharya, Abhijit Chatterjee: Low Cost Parametric Failure Diagnosis of RF Transceivers. European Test Symposium 2006: 205-212
4		Donghoon Han, Abhijit Chatterjee: Robust Built-In Test of RF ICs Using Envelope Detectors. Asian Test Symposium 2005: 2-7
3		Donghoon Han, Selim Sermet Akbay, Soumendu Bhattacharya, Abhijit Chatterjee, William R. Eisenstadt: On-Chip Self-Calibration of RF Circuits Using Specification-Driven Built-In Self Test (S-BIST). IOLTS 2005: 106-111
2		Donghoon Han, Abhijit Chatterjee: Device Resizing Based Optimization of Analog Circuits for Reduced Test Cost: Cost Metric and Case Study. Asian Test Symposium 2004: 420-425
1		Donghoon Han, Abhijit Chatterjee: Simulation-in-the-Loop Analog Circuit Sizing Method using Adaptive Model-based Simulated Annealing. IWSOC 2004: 127-130