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Yang Guo (Selection)

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44Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWanXia Qu, Tun Li, Yang Guo, Xiaodong Yang: Explicit Model Checking Based on Integer Pointer and Fibonacci Hash. ICYCS 2008: 844-849
43Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDan Zhu, Tun Li, Yang Guo, Sikun Li: 2D Decomposition Sequential Equivalence Checking of System Level and RTL Descriptions. ISQED 2008: 637-642
37Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYang Guo, WanXia Qu, Tun Li, Sikun Li: Coverage Driven Test Generation Framework for RTL Functional Verification. CAD/Graphics 2007: 321-326
36Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Sikun Li, Jinshan Yu, Yang Guo: A Novel Collaborative Verification Environment for SoC Co-Verification. CSCWD 2007: 145-150
29Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJinshan Yu, Tun Li, Yang Guo, QingPing Tan: Scheduling of Transactions Based on Extended Scheduling Timed Petri Nets for SoC System-Level Test-Case Generation. EUC 2006: 732-741
21Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Dan Zhu, Lei Liang, Yang Guo, Sikun Li: Automatic functional test program generation for microprocessor verification. ASP-DAC 2005: 1039-1042
20Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Yang Guo, Sikun Li, GongJie Liu: Predicate Abstraction of RTL Verilog Descriptions Using Constraint Logic Programming. ATVA 2005: 174-186
19Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Yang Guo, GongJie Liu, Sikun Li: Functional Vectors Generation for RT-Level Verilog Descriptions Based on Path Enumeration and Constraint Logic Programming. DSD 2005: 17-25
18Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Dan Zhu, Yang Guo, GongJie Liu, Sikun Li: MA2TG: A Functional Test Program Generator for Microprocessor Verification. DSD 2005: 176-183
16Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Yang Guo, Sikun Li, Dan Zhu: Applying Constraint Logic Programming to Predicate Abstraction of RTL Verilog Descriptions. MICAI 2005: 175-184
15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Yang Guo, Sikun Li: Assertion-based automated functional vectors generation using constraint logic programming. ACM Great Lakes Symposium on VLSI 2004: 288-291
14Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Yang Guo, Sikun Li, FuJiang Ao, GongJie Li: Parallel verilog simulation: architecture and circuit partition. ASP-DAC 2004: 644-646
13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Yang Guo, Sikun Li: CLP Based Static Property Checking. ATVA 2004: 495-498
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Yang Guo, Sikun Li: Design and Implementation of a Parallel Verilog Simulator: PVSim. VLSI Design 2004: 329-334
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Yang Guo, Sikun Li: Automatic Circuit Extractor for HDL Description Using Program Slicing. J. Comput. Sci. Technol. 19(5): 718-728 (2004)
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTun Li, Yang Guo, Sikun Li: An Automatic Circuit Extractor for RTL Verification. Asian Test Symposium 2003: 154-160

Selection of 16 from 73 records - Yang Guo has 99 coauthors

Last update 2012-09-10 CET by the DBLP TeamThis material is Open Data Content released under the ODC-BY 1.0 license — See also our legal information page