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| 12 |       | Demos Pavlou, Enric Gibert, Fernando Latorre, Antonio González: DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support. VEE 2012: 159-168 |
| 11 | | Indu Bhagat, Enric Gibert, F. Jesús Sánchez, Antonio González: Global productiveness propagation: a code optimization technique to speculatively prune useless narrow computations. LCTES 2011: 161-170 |
| 10 | | Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González: Boosting single-thread performance in multi-core systems through fine-grain multi-threading. ISCA 2009: 474-483 |
| 9 | | Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González: Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading. PACT 2009: 15-25 |
| 8 | | Enric Gibert, F. Jesús Sánchez, Antonio González: Instruction scheduling for a clustered VLIW processor with a word-interleaved cache. Concurrency and Computation: Practice and Experience 18(11): 1391-1411 (2006) |
| 7 | | Alex Settle, Dan Connors, Enric Gibert, Antonio González: A dynamically reconfigurable cache for multithreaded processors. J. Embedded Computing 2(2): 221-233 (2006) |
| 6 | | Enric Gibert, Jaume Abella, F. Jesús Sánchez, Xavier Vera, Antonio González: Variable-Based Multi-module Data Caches for Clustered VLIW Processors. IEEE PACT 2005: 207-217 |
| 5 | | Enric Gibert, F. Jesús Sánchez, Antonio González: Distributed Data Cache Designs for Clustered VLIW Processors. IEEE Trans. Computers 54(10): 1227-1241 (2005) |
| 4 | | Enric Gibert, F. Jesús Sánchez, Antonio González: Local Scheduling Techniques for Memory Coherence in a Clustered VLIW Processor with a Distributed Data Cache. CGO 2003: 193-203 |
| 3 | | Enric Gibert, F. Jesús Sánchez, Antonio González: Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors. MICRO 2003: 315-325 |
| 2 | | Enric Gibert, F. Jesús Sánchez, Antonio González: An interleaved cache clustered VLIW processor. ICS 2002: 210-219 |
| 1 | | Enric Gibert, F. Jesús Sánchez, Antonio González: Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor. MICRO 2002: 123-133 |
Selection of 12 from 12 records - Enric Gibert has 14 coauthors
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