Bernhard Eschermann (Selection)

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5 Bernhard Eschermann, Hans-Joachim Wunderlich: Optimized synthesis techniques for testable sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 11(3): 301-312 (1992)

3 Bernhard Eschermann, Hans-Joachim Wunderlich: A Unified Approach for the Synthesis of Self-Testable Finite State Machines. DAC 1991: 372-377

2 Bernhard Eschermann, Hans-Joachim Wunderlich: Emulation of Scan Paths in Sequential Circuit Synthesis. Fault-Tolerant Computing Systems 1991: 136-147

Selection of 3 from 10 records - Bernhard Eschermann has 4 coauthors

5		Bernhard Eschermann, Hans-Joachim Wunderlich: Optimized synthesis techniques for testable sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 11(3): 301-312 (1992)
3		Bernhard Eschermann, Hans-Joachim Wunderlich: A Unified Approach for the Synthesis of Self-Testable Finite State Machines. DAC 1991: 372-377
2		Bernhard Eschermann, Hans-Joachim Wunderlich: Emulation of Scan Paths in Sequential Circuit Synthesis. Fault-Tolerant Computing Systems 1991: 136-147