Malte Doerper (Selection)

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5 Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Heinrich Meyr: Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-Chips. IJES 3(3): 150-159 (2008)

4 Torsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout: A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms. DATE 2005: 876-881

3 Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs. SAMOS 2004: 138-148

2 Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Early ISS Integration into Network-on-Chip Designs. SAMOS 2004: 443-452

1 Tim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Serge Goossens: A modular simulation framework for architectural exploration of on-chip interconnection networks. CODES+ISSS 2003: 7-12

Selection of 5 from 5 records - Malte Doerper has 8 coauthors

5		Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Heinrich Meyr: Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-Chips. IJES 3(3): 150-159 (2008)
4		Torsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout: A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms. DATE 2005: 876-881
3		Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs. SAMOS 2004: 138-148
2		Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr: Early ISS Integration into Network-on-Chip Designs. SAMOS 2004: 443-452
1		Tim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Serge Goossens: A modular simulation framework for architectural exploration of on-chip interconnection networks. CODES+ISSS 2003: 7-12