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| 80 | Viji Srinivasan, Edward S. Davidson, Gary S. Tyson: A Prefetch Taxonomy. IEEE Trans. Computers 53(2): 126-140 (2004) | |
| 74 | Viji Srinivasan, Edward S. Davidson, Gary S. Tyson, Mark J. Charney, Thomas R. Puzak: Branch History Guided Instruction Prefetching. HPCA 2001: 291-300 | |
| 73 | Edward S. Tam, Stevan A. Vlaovic, Gary S. Tyson, Edward S. Davidson: Allocation by Conflict: A Simple Effective Multilateral Cache Management Scheme. ICCD 2001: 133-141 | |
| 70 | Mikhail Smelyanskiy, Gary S. Tyson, Edward S. Davidson: Register Queues: A New Hardware/Software Approach to Efficient Software Pipelining. IEEE PACT 2000: 3-12 | |
| 69 | Stevan A. Vlaovic, Edward S. Davidson, Gary S. Tyson: Improving BTB performance in the presence of DLLs. MICRO 2000: 77-86 | |
| 67 | Edward S. Tam, Jude A. Rivers, Vijayalakshmi Srinivasan, Gary S. Tyson, Edward S. Davidson: Active Management of Data Caches by Exploiting Reuse Information. IEEE Trans. Computers 48(11): 1244-1259 (1999) | |
| 60 | Jude A. Rivers, Edward S. Tam, Gary S. Tyson, Edward S. Davidson, Matthew K. Farrens: Utilizing Reuse Information in Data Cache Management. International Conference on Supercomputing 1998: 449-456 | |
| 59 | Edward S. Tam, Jude A. Rivers, Gary S. Tyson, Edward S. Davidson: mlcache: A Flexible Multi-Lateral Cache Simulator. MASCOTS 1998: 19-26 | |
| 56 | Jude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin: On High-Bandwidth Data Cache Design for Multi-Issue Processors. MICRO 1997: 46-56 |
Selection of 9 from 82 records - Edward S. Davidson has 89 coauthors
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