Jae Hun Choi (Selection)

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3 Jae-Hyuck Kwak, Jae Hun Choi, Earl E. Swartzlander Jr.: High-Speed CORDIC Based on an Overlapped Architecture and a Novel sigma-Prediction Method. VLSI Signal Processing 25(2): 167-177 (2000)

2 Jae Hun Choi, Jae-Hyuck Kwak, Earl E. Swartzlander Jr.: High-Speed CORDIC Architecture Based on Redundant Sum Formation and Overlapped s-Selection. ICCD 1999: 68-72

Selection of 2 from 4 records - Jae Hun Choi has 6 coauthors

3		Jae-Hyuck Kwak, Jae Hun Choi, Earl E. Swartzlander Jr.: High-Speed CORDIC Based on an Overlapped Architecture and a Novel sigma-Prediction Method. VLSI Signal Processing 25(2): 167-177 (2000)
2		Jae Hun Choi, Jae-Hyuck Kwak, Earl E. Swartzlander Jr.: High-Speed CORDIC Architecture Based on Redundant Sum Formation and Overlapped s-Selection. ICCD 1999: 68-72