Kai-Wen Cheng (Selection)

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1 Chingwei Yeh, En-Feng Hsu, Kai-Wen Cheng, Jinn-Shyan Wang, Nai-Jen Chang: An 830mW, 586kbps 1024-bit RSA chip design. DATE Designers' Forum 2006: 24-29

Selection of 1 from 4 records - Kai-Wen Cheng has 6 coauthors

Last update 2012-09-10 CET by the DBLP Team —

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