Yuan Chen (Selection)

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1 Rajive Bagrodia, Zheng Li, Vikas Jha, Yuan Chen, Jason Cong: Parallel logic level simulation of VLSI circuits. Winter Simulation Conference 1994: 1354-1361

Selection of 1 from 85 records - Yuan Chen has 282 coauthors

Last update 2012-09-10 CET by the DBLP Team —

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