Wen-Tsuen Chen (Selection)

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34 Ruey-Feng Chang, Wen-Tsuen Chen, Jia-Shung Wang: A fast finite-state algorithm for vector quantizer design. IEEE Transactions on Signal Processing 40(1): 221-225 (1992)

19 Wen-Tsuen Chen, Jia-Shung Wang, Chia-Cheng Liu, Shi-Jinn Horng, Chang-Biau Yang, Ruey-Zone Huang, Bern-Cherng Liaw: Design of An Integrated Parallel Processing System with Systolic VLSI Chips. J. Inf. Sci. Eng. 7(2): 217-235 (1991)

Selection of 2 from 96 records - Wen-Tsuen Chen has 97 coauthors

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34		Ruey-Feng Chang, Wen-Tsuen Chen, Jia-Shung Wang: A fast finite-state algorithm for vector quantizer design. IEEE Transactions on Signal Processing 40(1): 221-225 (1992)
19		Wen-Tsuen Chen, Jia-Shung Wang, Chia-Cheng Liu, Shi-Jinn Horng, Chang-Biau Yang, Ruey-Zone Huang, Bern-Cherng Liaw: Design of An Integrated Parallel Processing System with Systolic VLSI Chips. J. Inf. Sci. Eng. 7(2): 217-235 (1991)