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Krishna Chakravadhanula (Selection)

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5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLBrion L. Keller, Krishna Chakravadhanula, Brian Foutz, Vivek Chickermane, R. Malneedi, Thomas J. Snethen, Vikram Iyengar, David E. Lackey, Gary Grise: Low cost at-speed testing using On-Product Clock Generation compatible with test compression. ITC 2010: 724-733
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKrishna Chakravadhanula, Vivek Chickermane, Brion L. Keller, Patrick R. Gallagher Jr., Anis Uzzaman: Why is Conventional ATPG Not Sufficient for Advanced Low Power Designs?. Asian Test Symposium 2009: 295-300
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKrishna Chakravadhanula, Vivek Chickermane, Brion L. Keller, Patrick R. Gallagher Jr., Prashant Narang: Capture power reduction using clock gating aware test generation. ITC 2009: 1-9
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKrishna Chakravadhanula, Vivek Chickermane: Automating IEEE 1500 Core Test—An EDA Perspective. IEEE Design & Test of Computers 26(3): 6-15 (2009)
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVivek Chickermane, Patrick R. Gallagher Jr., James Sage, Paul Yuan, Krishna Chakravadhanula: A Power-Aware Test Methodology for Multi-Supply Multi-Voltage Designs. ITC 2008: 1-10

Selection of 5 from 5 records - Krishna Chakravadhanula has 13 coauthors

Last update 2012-09-10 CET by the DBLP TeamThis material is Open Data Content released under the ODC-BY 1.0 license — See also our legal information page