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Joan Cabestany (Selection)

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30Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLE. Cantó, Juan Manuel Moreno, Joan Cabestany, I. Lacadena, Josep Maria Insenser: A temporal bipartitioning algorithm for dynamically reconfigurable FPGAs. IEEE Trans. VLSI Syst. 9(1): 210-218 (2001)
26Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLE. Cantó, Juan Manuel Moreno, Joan Cabestany, I. Lacadena, Josep Maria Insenser: Implementation of Virtual Circuits by Means of the FIPSOC Devices. FPL 2000: 87-95
23Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJuan Manuel Moreno, Jordi Madrenas, Joan Cabestany, E. Cantó, Rafal Kielbik, Julio Faura, Josep Maria Insenser: Realization of Self-Repairing and Evolvable Hardware Structures by Means of Implicit Self-Configuration. Evolvable Hardware 1999: 182-187
22Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLE. Cantó, Juan Manuel Moreno, Joan Cabestany, Julio Faura, Josep Maria Insenser: A Bipartitioning Algorithm for Dynamic Reconfigurable Programmable Logic. FPL 1999: 134-143
20Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJuan Manuel Moreno, Joan Cabestany, E. Cantó, Julio Faura, Josep Maria Insenser: The Role of Dynamic Reconfiguration for Implementing Artificial Neural Networks Models in Programmable Hardware. IWANN (2) 1999: 85-94
17Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJuan Manuel Moreno, Jordi Madrenas, Julio Faura, E. Cantó, Joan Cabestany, Josep Maria Insenser: Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC Devices. ICES 1998: 345-355

Selection of 6 from 57 records - Joan Cabestany has 50 coauthors

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