Robert K. Brayton (Selection)

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123 Jagesh V. Sanghavi, Rajeev K. Ranjan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: High Performance BDD Package By Exploiting Memory Hiercharchy. DAC 1996: 635-640

117 Rajeev K. Ranjan, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Binary decision diagrams on network of workstation. ICCD 1996: 358-364

63 Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Espresso-Signature: A New Exact Minimizer for Logic Functions. DAC 1993: 618-624

53 Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Minimization of Logic Functions Using Essential Signature Sets. VLSI Design 1993: 323-328

51 Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: ESPRESSO-SIGNATURE: a new exact minimizer for logic functions. IEEE Trans. VLSI Syst. 1(4): 432-440 (1993)

Selection of 5 from 261 records - Robert K. Brayton has 131 coauthors

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123		Jagesh V. Sanghavi, Rajeev K. Ranjan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: High Performance BDD Package By Exploiting Memory Hiercharchy. DAC 1996: 635-640
117		Rajeev K. Ranjan, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Binary decision diagrams on network of workstation. ICCD 1996: 358-364
63		Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Espresso-Signature: A New Exact Minimizer for Logic Functions. DAC 1993: 618-624
53		Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Minimization of Logic Functions Using Essential Signature Sets. VLSI Design 1993: 323-328
51		Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: ESPRESSO-SIGNATURE: a new exact minimizer for logic functions. IEEE Trans. VLSI Syst. 1(4): 432-440 (1993)