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Laxmi N. Bhuyan (Selection)

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84Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRavi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda: Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors. IPDPS 2000: 721-728
75Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLaxmi N. Bhuyan, Ravi R. Iyer, Tahsin Askar, Ashwini K. Nanda, Mohan Kumar: Performance of Multistage Bus Networks for a Distributed Shared Memory Multiprocessor. IEEE Trans. Parallel Distrib. Syst. 8(1): 82-95 (1997)
60no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLaxmi N. Bhuyan, Ashwini K. Nanda, Tahsin Askar: Performance and Reliability of the Multistage Bus Network. ICPP (1) 1994: 26-33
51Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAshwini K. Nanda, Laxmi N. Bhuyan: Design and Analysis of Cache Coherent Multistage Interconnection Networks. IEEE Trans. Computers 42(4): 458-470 (1993)
49Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAshwini K. Nanda, Laxmi N. Bhuyan: Efficient Mapping of Applications on Cache Based Multiprocessors. J. Parallel Distrib. Comput. 19(3): 179-191 (1993)
47no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAshwini K. Nanda, Laxmi N. Bhuyan: A Formal Specification and Verification Technique for Cache Coherence Protocols. ICPP (1) 1992: 22-26
46no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAshwini K. Nanda, Laxmi N. Bhuyan: Mapping Applications onto a Cache Coherent Multiprocessor. SC 1992: 368-377
40Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLaxmi N. Bhuyan, Ashwini K. Nanda: Multistage bus network (MBN): an interconnection network for cache coherent multiprocessors. SPDP 1991: 780-787

Selection of 8 from 193 records - Laxmi N. Bhuyan has 123 coauthors

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