Rami Beidas (Selection)

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3 Rami Beidas, Jianwen Zhu: Scalable interprocedural register allocation for high level synthesis. ASP-DAC 2005: 511-516

2 Rami Beidas, Jianwen Zhu: A queuing-theoretic performance model for context-flow system-on-chip platforms. ESTImedia 2004: 21-26

1 Rami Beidas, Jianwen Zhu: Performance Efficiency of Context-Flow System-on-Chip Platform. ICCAD 2003: 356-362

Selection of 3 from 3 records - Rami Beidas has 1 coauthors

3		Rami Beidas, Jianwen Zhu: Scalable interprocedural register allocation for high level synthesis. ASP-DAC 2005: 511-516
2		Rami Beidas, Jianwen Zhu: A queuing-theoretic performance model for context-flow system-on-chip platforms. ESTImedia 2004: 21-26
1		Rami Beidas, Jianwen Zhu: Performance Efficiency of Context-Flow System-on-Chip Platform. ICCAD 2003: 356-362