Daniel K. Beece (Selection)

List of publications from the DBLP Bibliography Server - FAQ

Ask others: ACM DL/Guide -

3 Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Vijay S. Iyengar, Gabriel M. Silberman: SLS-a fast switch-level simulator [for MOS]. IEEE Trans. on CAD of Integrated Circuits and Systems 7(8): 838-849 (1988)

2 Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Vijay S. Iyengar, Gabriel M. Silberman: SLS - a fast switch level simulator for verification and fault coverage analysis. DAC 1986: 164-170

1 Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Gabriel M. Silberman: Using a Hardware Simulation Engine for Custom MOS Structured Designs. IBM Journal of Research and Development 28(5): 564-571 (1984)

Selection of 3 from 13 records - Daniel K. Beece has 177 coauthors

Last update 2012-09-10 CET by the DBLP Team —

Content released under the ODC-BY 1.0 license — See also our legal information page

3		Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Vijay S. Iyengar, Gabriel M. Silberman: SLS-a fast switch-level simulator [for MOS]. IEEE Trans. on CAD of Integrated Circuits and Systems 7(8): 838-849 (1988)
2		Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Vijay S. Iyengar, Gabriel M. Silberman: SLS - a fast switch level simulator for verification and fault coverage analysis. DAC 1986: 164-170
1		Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Gabriel M. Silberman: Using a Hardware Simulation Engine for Custom MOS Structured Designs. IBM Journal of Research and Development 28(5): 564-571 (1984)