Shankar Balachandran (Selection)

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6 PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia: On metrics for comparing interconnect estimation methods for FPGAs. IEEE Trans. VLSI Syst. 12(4): 381-385 (2004)

4 PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia: On metrics for comparing routability estimation methods for FPGAs. DAC 2002: 70-75

3 PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia: Rapid and Reliable Routability Estimation for FPGAs. FPL 2002: 242-252

2 Shankar Balachandran, PariVallal Kannan, Dinesh Bhatia: On Routing Demand and Congestion Estimation for FPGAs. VLSI Design 2002: 639-646

1 PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia: fGREP - Fast Generic Routing Demand Estimation for Placed FPGA Circuits. FPL 2001: 37-47

Selection of 5 from 8 records - Shankar Balachandran has 2 coauthors

6		PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia: On metrics for comparing interconnect estimation methods for FPGAs. IEEE Trans. VLSI Syst. 12(4): 381-385 (2004)
4		PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia: On metrics for comparing routability estimation methods for FPGAs. DAC 2002: 70-75
3		PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia: Rapid and Reliable Routability Estimation for FPGAs. FPL 2002: 242-252
2		Shankar Balachandran, PariVallal Kannan, Dinesh Bhatia: On Routing Demand and Congestion Estimation for FPGAs. VLSI Design 2002: 639-646
1		PariVallal Kannan, Shankar Balachandran, Dinesh Bhatia: fGREP - Fast Generic Routing Demand Estimation for Placed FPGA Circuits. FPL 2001: 37-47