Jun Ho Bahn (Selection)

List of publications from the DBLP Bibliography Server - FAQ

Ask others: ACM DL/Guide -

5 Seung Eun Lee, Jun Ho Bahn, Yoon Seok Yang, Nader Bagherzadeh: A Generic Network Interface Architecture for a Networked Processor Array (NePA). ARCS 2008: 247-260

3 Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungsook Yang, Nader Bagherzadeh: On Design and Application Mapping of a Network-on-Chip(NoC) Architecture. Parallel Processing Letters 18(2): 239-255 (2008)

2 Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh: On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture. ITNG 2007: 1033-1038

1 Seung Eun Lee, Jun Ho Bahn, Nader Bagherzadeh: Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP). SBAC-PAD 2007: 211-218

Selection of 4 from 7 records - Jun Ho Bahn has 5 coauthors

5		Seung Eun Lee, Jun Ho Bahn, Yoon Seok Yang, Nader Bagherzadeh: A Generic Network Interface Architecture for a Networked Processor Array (NePA). ARCS 2008: 247-260
3		Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungsook Yang, Nader Bagherzadeh: On Design and Application Mapping of a Network-on-Chip(NoC) Architecture. Parallel Processing Letters 18(2): 239-255 (2008)
2		Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh: On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture. ITNG 2007: 1033-1038
1		Seung Eun Lee, Jun Ho Bahn, Nader Bagherzadeh: Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP). SBAC-PAD 2007: 211-218