Tetsuya Asai (Selection)

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50 Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: A 1-muhboxW 600- hboxppm/^circhboxC Current Reference Circuit Consisting of Subthreshold CMOS Circuits. IEEE Trans. on Circuits and Systems 57-II(9): 681-685 (2010)

49 Shin'ichi Asai, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya: High-Resistance Resistor Consisting of a Subthreshold CMOS Differential Pair. IEICE Transactions 93-C(6): 741-746 (2010)

48 Yusuke Tsugita, Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs. IEICE Transactions 93-C(6): 835-841 (2010)

46 Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: A 300 nW, 7 ppm/degreeC CMOS voltage reference circuit based on subthreshold MOSFETs. ASP-DAC 2009: 95-96

42 Yusuke Tsugita, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya, Tetsuya Hirose: On-chip PVT Compensation Techniques for Low-voltage CMOS Digital LSIs. ISCAS 2009: 1565-1568

41 Ken Ueno, Tetsuya Asai, Yoshihito Amemiya: Low-power Clock Reference Circuit for Intermittent Operation of Subthreshold LSIs. ISCAS 2009: 5-8

37 Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: Low-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques. IEICE Transactions 92-A(12): 3079-3081 (2009)

28 Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: Floating millivolt reference for PTAT current generation in Subthreshold MOS LSIs. ISCAS 2007: 3748-3751

19 Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: A CMOS Watchdog Sensor for Certifying the Quality of Various Perishables with a Wider Activation Energy. IEICE Transactions 89-A(4): 902-907 (2006)

Selection of 9 from 52 records - Tetsuya Asai has 42 coauthors

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50		Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: A 1-muhboxW 600- hboxppm/^circhboxC Current Reference Circuit Consisting of Subthreshold CMOS Circuits. IEEE Trans. on Circuits and Systems 57-II(9): 681-685 (2010)
49		Shin'ichi Asai, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya: High-Resistance Resistor Consisting of a Subthreshold CMOS Differential Pair. IEICE Transactions 93-C(6): 741-746 (2010)
48		Yusuke Tsugita, Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: An On-Chip PVT Compensation Technique with Current Monitoring Circuit for Low-Voltage CMOS Digital LSIs. IEICE Transactions 93-C(6): 835-841 (2010)
46		Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: A 300 nW, 7 ppm/degreeC CMOS voltage reference circuit based on subthreshold MOSFETs. ASP-DAC 2009: 95-96
42		Yusuke Tsugita, Ken Ueno, Tetsuya Asai, Yoshihito Amemiya, Tetsuya Hirose: On-chip PVT Compensation Techniques for Low-voltage CMOS Digital LSIs. ISCAS 2009: 1565-1568
41		Ken Ueno, Tetsuya Asai, Yoshihito Amemiya: Low-power Clock Reference Circuit for Intermittent Operation of Subthreshold LSIs. ISCAS 2009: 5-8
37		Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: Low-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques. IEICE Transactions 92-A(12): 3079-3081 (2009)
28		Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: Floating millivolt reference for PTAT current generation in Subthreshold MOS LSIs. ISCAS 2007: 3748-3751
19		Ken Ueno, Tetsuya Hirose, Tetsuya Asai, Yoshihito Amemiya: A CMOS Watchdog Sensor for Certifying the Quality of Various Perishables with a Wider Activation Energy. IEICE Transactions 89-A(4): 902-907 (2006)