Shohei Abe (Selection)

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7 Masayasu Suzuki, Yohei Hasegawa, Vu Manh Tuan, Shohei Abe, Hideharu Amano: A cost-effective context memory structure for dynamically reconfigurable processors. IPDPS 2006

5 Katsuaki Deguchi, Shohei Abe, Masayasu Suzuki, Kenichiro Anjo, Toru Awashima, Hideharu Amano: Implementing core tasks of JPEG2000 Encoder on the Dynamically Reconfigurable Processor. ARCS Workshops 2005: 12-18

4 Hideharu Amano, Shohei Abe, Yohei Hasegawa, Katsuaki Deguchi, Masayasu Suzuki: Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor. FCCM 2005: 315-316

3 Yohei Hasegawa, Shohei Abe, Katsuaki Deguchi, Masayasu Suzuki, Hideharu Amano: Time-multiplexed execution on the dynamically reconfigurable processor: a performance/cost evaluation. FPGA 2005: 265

Selection of 4 from 8 records - Shohei Abe has 14 coauthors

Last update 2012-09-10 CET by the DBLP Team —

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7		Masayasu Suzuki, Yohei Hasegawa, Vu Manh Tuan, Shohei Abe, Hideharu Amano: A cost-effective context memory structure for dynamically reconfigurable processors. IPDPS 2006
5		Katsuaki Deguchi, Shohei Abe, Masayasu Suzuki, Kenichiro Anjo, Toru Awashima, Hideharu Amano: Implementing core tasks of JPEG2000 Encoder on the Dynamically Reconfigurable Processor. ARCS Workshops 2005: 12-18
4		Hideharu Amano, Shohei Abe, Yohei Hasegawa, Katsuaki Deguchi, Masayasu Suzuki: Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor. FCCM 2005: 315-316
3		Yohei Hasegawa, Shohei Abe, Katsuaki Deguchi, Masayasu Suzuki, Hideharu Amano: Time-multiplexed execution on the dynamically reconfigurable processor: a performance/cost evaluation. FPGA 2005: 265