BibTeX record phd/ndltd/Ferlin10

download as .bib file

@phdthesis{DBLP:phd/ndltd/Ferlin10,
  author       = {Edson Pedro Ferlin},
  title        = {Arquitetura paralela reconfigur{\'{a}}vel baseada em fluxo de
                  dados implementada em {FPGA}},
  school       = {Federal University of Technology - Paran{\'{a}}, Brazil},
  year         = {2010},
  url          = {http://repositorio.utfpr.edu.br/jspui/handle/1/128},
  timestamp    = {Sat, 12 Aug 2017 16:56:28 +0200},
  biburl       = {https://dblp.org/rec/phd/ndltd/Ferlin10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.