![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
BibTeX record journals/vlsisp/SchonfeldFSPVM95
@article{DBLP:journals/vlsisp/SchonfeldFSPVM95, author = {Mirjam Sch{\"{o}}nfeld and Jens Franzen and Markus Schwiegershausen and Peter Pirsch and Uwe Vehlies and Andreas M{\"{u}}nzner}, title = {The {LISA} design environment for the synthesis of array processors including memories for the data transfer and fault tolerance by reconfiguration and coding techniques}, journal = {J. {VLSI} Signal Process.}, volume = {11}, number = {1-2}, pages = {51--74}, year = {1995}, url = {https://doi.org/10.1007/BF02106823}, doi = {10.1007/BF02106823}, timestamp = {Wed, 20 May 2020 21:26:14 +0200}, biburl = {https://dblp.org/rec/journals/vlsisp/SchonfeldFSPVM95.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.