@article{DBLP:journals/vlsisp/LeeT95,
author = {Chen-Yi Lee and
Jer-Min Tsai},
title = {A shift register architecture for high-speed data sorting},
journal = {VLSI Signal Processing},
volume = {11},
number = {3},
year = {1995},
pages = {273-280},
ee = {http://dx.doi.org/10.1007/BF02107058},
bibsource = {DBLP, http://dblp.uni-trier.de}
}