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BibTeX record journals/vlsisp/LeeL07
@article{DBLP:journals/vlsisp/LeeL07, author = {Sze Wei Lee and Soon{-}Chieh Lim}, title = {An Enhanced Memory Address Mapping Scheme for Improved Memory Access Performance of 2-D {DWT} Processing Systems}, journal = {J. {VLSI} Signal Process.}, volume = {47}, number = {3}, pages = {201--221}, year = {2007}, url = {https://doi.org/10.1007/s11265-006-0042-5}, doi = {10.1007/S11265-006-0042-5}, timestamp = {Wed, 20 May 2020 21:26:35 +0200}, biburl = {https://dblp.org/rec/journals/vlsisp/LeeL07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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