A defect-tolerant systolic array implementation for real time image processing.

V. Hecht Karsten Rönner Peter Pirsch A defect-tolerant systolic array implementation for real time image processing. 37-47 1993 5 VLSI Signal Processing 1 http://dx.doi.org/10.1007/BF01880270 db/journals/vlsisp/vlsisp5.html#HechtRP93