@article{DBLP:journals/vlsisp/CaireVHB95,
author = {Giuseppe Caire and
Javier Ventura-Traveset and
M. Hollreiser and
Ezio Biglieri},
title = {Systolic architecture for the VLSI implementation of high-speed
staged decoders/quantizers},
journal = {VLSI Signal Processing},
volume = {10},
number = {2},
year = {1995},
pages = {153-168},
ee = {http://dx.doi.org/10.1007/BF02407033},
bibsource = {DBLP, http://dblp.uni-trier.de}
}