BibTeX record journals/vlsisp/AbidJRDA18

download as .bib file

@article{DBLP:journals/vlsisp/AbidJRDA18,
  author       = {Mariem Abid and
                  Khaled Jerbi and
                  Micka{\"{e}}l Raulet and
                  Olivier D{\'{e}}forges and
                  Mohamed Abid},
  title        = {Efficient System-Level Hardware Synthesis of Dataflow Programs Using
                  Shared Memory Based {FIFO} - {HEVC} Decoder Case Study},
  journal      = {J. Signal Process. Syst.},
  volume       = {90},
  number       = {1},
  pages        = {127--144},
  year         = {2018},
  url          = {https://doi.org/10.1007/s11265-017-1226-x},
  doi          = {10.1007/S11265-017-1226-X},
  timestamp    = {Thu, 12 Mar 2020 17:20:27 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsisp/AbidJRDA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.