BibTeX record journals/vlsi/ChangCCJD01

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@article{DBLP:journals/vlsi/ChangCCJD01,
  author       = {Shih{-}Chieh Chang and
                  Kwen{-}Yo Chen and
                  Ching{-}Hsiang Cheng and
                  Wen{-}Ben Jone and
                  Sunil R. Das},
  title        = {Random Pattern Testability Enhancement by Circuit Rewiring},
  journal      = {{VLSI} Design},
  volume       = {12},
  number       = {4},
  pages        = {537--549},
  year         = {2001},
  url          = {https://doi.org/10.1155/2001/87048},
  doi          = {10.1155/2001/87048},
  timestamp    = {Mon, 08 May 2023 17:16:37 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsi/ChangCCJD01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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