BibTeX record journals/vlsi/AizikK11

download as .bib file

@article{DBLP:journals/vlsi/AizikK11,
  author       = {Yoni Aizik and
                  Avinoam Kolodny},
  title        = {Finding the Energy Efficient Curve: Gate Sizing for Minimum Power
                  under Delay Constraints},
  journal      = {{VLSI} Design},
  volume       = {2011},
  pages        = {845957:1--845957:13},
  year         = {2011},
  url          = {https://doi.org/10.1155/2011/845957},
  doi          = {10.1155/2011/845957},
  timestamp    = {Sat, 24 Nov 2018 11:58:53 +0100},
  biburl       = {https://dblp.org/rec/journals/vlsi/AizikK11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.