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BibTeX record journals/tvlsi/ValentianTVA04
@article{DBLP:journals/tvlsi/ValentianTVA04, author = {Alexandre Valentian and Olivier Thomas and Andrei Vladimirescu and Amara Amara}, title = {Modeling subthreshold {SOI} logic for static timing analysis}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {12}, number = {6}, pages = {662--669}, year = {2004}, url = {https://doi.org/10.1109/TVLSI.2004.827602}, doi = {10.1109/TVLSI.2004.827602}, timestamp = {Wed, 11 Mar 2020 18:16:54 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/ValentianTVA04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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