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BibTeX record journals/tvlsi/TsaiSW00
@article{DBLP:journals/tvlsi/TsaiSW00, author = {Wei{-}Chang Tsai and C. Bernard Shung and Sheng{-}Jyh Wang}, title = {Two systolic architectures for modular multiplication}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {8}, number = {1}, pages = {103--107}, year = {2000}, url = {https://doi.org/10.1109/92.820767}, doi = {10.1109/92.820767}, timestamp = {Sat, 30 Sep 2023 10:29:54 +0200}, biburl = {https://dblp.org/rec/journals/tvlsi/TsaiSW00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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