Layout conscious approach and bus architecture synthesis for hardware/software codesign of systems on chip optimized for speed.

Nattawut Thepayasuwan Alex Doboli Layout conscious approach and bus architecture synthesis for hardware/software codesign of systems on chip optimized for speed. 525-538 2005 13 IEEE Trans. VLSI Syst. 5 http://doi.ieeecomputersociety.org/10.1109/TVLSI.2004.842910 db/journals/tvlsi/tvlsi13.html#ThepayasuwanD05