SuTWHCWLK08'

@article{DBLP:journals/tvlsi/SuTWHCWLK08,
  author    = {Chin-Lung Su and
               Chih-Wea Tsai and
               Cheng-Wen Wu and
               Chien-Chung Hung and
               Young-Shying Chen and
               Ding-Yeong Wang and
               Yuan-Jen Lee and
               Ming-Jer Kao},
  title     = {Write Disturbance Modeling and Testing for MRAM},
  journal   = {IEEE Trans. VLSI Syst.},
  volume    = {16},
  number    = {3},
  year      = {2008},
  pages     = {277-288},
  ee        = {http://dx.doi.org/10.1109/TVLSI.2007.915402},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}