Jaewon Seo Taewhan Kim Preeti Ranjan Panda Memory allocation and mapping in high-level synthesis - an integrated approach. 928-938 2003 11 IEEE Trans. VLSI Syst. 5 http://doi.ieeecomputersociety.org/10.1109/TVLSI.2003.817116 db/journals/tvlsi/tvlsi11.html#SeoKP03