BibTeX record journals/tvlsi/SehgalOC06

download as .bib file

@article{DBLP:journals/tvlsi/SehgalOC06,
  author       = {Anuja Sehgal and
                  Sule Ozev and
                  Krishnendu Chakrabarty},
  title        = {Test infrastructure design for mixed-signal SOCs with wrapped analog
                  cores},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {14},
  number       = {3},
  pages        = {292--304},
  year         = {2006},
  url          = {https://doi.org/10.1109/TVLSI.2006.871758},
  doi          = {10.1109/TVLSI.2006.871758},
  timestamp    = {Wed, 11 Mar 2020 18:17:01 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/SehgalOC06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.