BibTeX record journals/tvlsi/PandeyG07

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@article{DBLP:journals/tvlsi/PandeyG07,
  author       = {Sujan Pandey and
                  Manfred Glesner},
  title        = {Simultaneous On-Chip Bus Synthesis and Voltage Scaling Under Random
                  On-Chip Data Traffic},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {15},
  number       = {10},
  pages        = {1111--1124},
  year         = {2007},
  url          = {https://doi.org/10.1109/TVLSI.2007.903924},
  doi          = {10.1109/TVLSI.2007.903924},
  timestamp    = {Wed, 11 Mar 2020 18:18:41 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/PandeyG07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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