A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance.

Mitchell J. Myjak José G. Delgado-Frias A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance. 14-23 2008 16 IEEE Trans. VLSI Syst. 1 http://doi.ieeecomputersociety.org/10.1109/TVLSI.2007.912080 db/journals/tvlsi/tvlsi16.html#MyjakD08