Speed and area tradeoffs in cluster-based FPGA architectures.

Alexander Marquardt Vaughn Betz Jonathan Rose Speed and area tradeoffs in cluster-based FPGA architectures. 84-93 2000 8 IEEE Trans. VLSI Syst. 1 http://doi.ieeecomputersociety.org/10.1109/92.820764 db/journals/tvlsi/tvlsi8.html#MarquardtBR00