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BibTeX record journals/tvlsi/HuiLWLZM24
@article{DBLP:journals/tvlsi/HuiLWLZM24, author = {YaJuan Hui and Qingzhen Li and Leimin Wang and Cheng Liu and Deming Zhang and Xiangshui Miao}, title = {In-Memory Wallace Tree Multipliers Based on Majority Gates Within Voltage-Gated {SOT-MRAM} Crossbar Arrays}, journal = {{IEEE} Trans. Very Large Scale Integr. Syst.}, volume = {32}, number = {3}, pages = {497--504}, year = {2024}, url = {https://doi.org/10.1109/TVLSI.2024.3350151}, doi = {10.1109/TVLSI.2024.3350151}, timestamp = {Sat, 16 Mar 2024 15:10:28 +0100}, biburl = {https://dblp.org/rec/journals/tvlsi/HuiLWLZM24.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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