Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit.

Yinhe Han Yu Hu Xiaowei Li Huawei Li Anshuman Chandra Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit. 531-540 2007 15 IEEE Trans. VLSI Syst. 5 http://dx.doi.org/10.1109/TVLSI.2007.893652 db/journals/tvlsi/tvlsi15.html#HanHLLC07